The following registers ( spr0data and spr0datb ), although defined in the
address space of the main processor, are normally used only by the display
processor. They are the holding registers for the data obtained by DMA
cycles.

          SPR0DATA, SPR0DATB      data registers for Sprite 0
          SPR1DATA, SPR1DATB      data registers for Sprite 1
          SPR2DATA, SPR2DATB      data registers for Sprite 2
          SPR3DATA, SPR3DATB      data registers for Sprite 3
          SPR4DATA, SPR4DATB      data registers for Sprite 4
          SPR5DATA, SPR5DATB      data registers for Sprite 5
          SPR6DATA, SPR6DATB      data registers for Sprite 6
          SPR7DATA, SPR7DATB      data registers for Sprite 7